2024 Faculty Courses School of Engineering Department of Information and Communications Engineering Graduate major in Information and Communications Engineering
VLSI Layout Design
- Academic unit or major
- Graduate major in Information and Communications Engineering
- Instructor(s)
- Atsushi Takahashi
- Class Format
- Lecture (Face-to-face)
- Media-enhanced courses
- -
- Day of week/Period
(Classrooms) - 3-4 Tue / 3-4 Fri
- Class
- -
- Course Code
- ICT.I419
- Number of credits
- 200
- Course offered
- 2024
- Offered quarter
- 4Q
- Syllabus updated
- Mar 14, 2025
- Language
- English
Syllabus
Course overview and goals
VLSIs that support information and communications engineering are realized through system and behavior design, logic and circuit design, layout design, and performance verification. Among these design stages, layout design is often called physical design or place and route by the procedures included in it. The purpose of this lecture is to understand the fact that layout design is one of the most important design stages by which the performance of VLSI is highly affected, and to acquire basic layout design methods.
Course description and aims
By the end of this course, students will be able to:
1) Understand and explain the overview of VLSI layout design
2) Acquire basic design methods and apply them to solove basic problems
3) Understandand explain the most of layout design problems are formulated by utilizing combinational aspect of them
4) Understand and explain approaches to tackle unsolved problems.
Keywords
Layout, Partition, Placement, Routing
Competencies
- Specialist skills
- Intercultural skills
- Communication skills
- Critical thinking skills
- Practical and/or problem-solving skills
Class flow
The overview of VLSI design is surveyed, and recent topics and methods for them as well as research topics that are requested to be solved in VLSI layout design are introduced. It is shown that the most of layout design problems are formulated by utilizing combinational aspect of them, and algorithms for them are introduced according to layout design process. Solved problems as well as unsolved problems are specified, and gives research topics.
Course schedule/Objectives
| Course schedule | Objectives | |
|---|---|---|
| Class 1 | Layout design in VLSI design | Explain the overview of layout design |
| Class 2 | Layout design process | Explain the overview of layout design process |
| Class 3 | Time complexity of algorithm | Explain the overview of time complexity of algorithm |
| Class 4 | Partitioning (1) overview | Explain the overview of partitioning |
| Class 5 | Partitioning (2) logic partitioning | Explain the overview of methods for logic partitioning |
| Class 6 | Placement (1) overview | Explain the overview of placement |
| Class 7 | Placement (2) representation | Explain the overview of representations for placement Explain the overview of placement |
| Class 8 | Placement (3) search method | Explain the overview of search methods for placement |
| Class 9 | Routing (1) overview | Explain the overview of routing algorithm |
| Class 10 | Routing (2) planar routing | Explain the overview of methods for planar routing |
| Class 11 | Routing (3) minimization of contact vias | Explain the overview of methods for minimization of contact vias |
| Class 12 | Routing (4) shortest path routing | Explain the overview of methods for shortest path routing |
| Class 13 | Routing (5) channel routing | Explain the overview of methods for channel routing |
| Class 14 | Routing (6) clock routing | Explain the overview of methods for clock routing |
Study advice (preparation and review)
To enhance effective learning, students are encouraged to spend approximately 100 minutes preparing for class and another 100 minutes reviewing class content afterwards (including assignments) for each class.
They should do so by referring to textbooks and other course material.
Textbook(s)
None
Reference books, course materials, etc.
Handouts will be distributed at the beginning of class when necessary
Evaluation methods and criteria
Studnets' level of understanding on the basic layout design methods will be assessed. Learning achievement is evaluated by the quality of the written reports.
Related courses
- ICT.M215 ： Discrete Structures and Algorithms
- ICT.M306 ： Concrete Mathematics
- ICT.M310 ： Mathematical Programming
- ICT.I415 ： VLSI System Design
- ICT.A515 ： Theory of Parallel and VLSI Computation
Prerequisites
No prerequisites
Other
This lecture is also held as an activity of the Integrated Green-niX College in the Integrated Green-niX research and human resource development, supported by MEXT Initiative to Establish Next-generation Novel Integrated Circuits Centers (X-NICS) JPJ011438.