2024 Faculty Courses School of Engineering Undergraduate major in Information and Communications Engineering

Computer Logic Design (ICT)

Academic unit or major: Undergraduate major in Information and Communications Engineering
Instructor(s): Tsuyoshi Isshiki / Yoshihiro Watanabe
Class Format: Lecture (Face-to-face)
Media-enhanced courses: -
Day of week/Period (Classrooms): 7-8 Tue / 7-8 Fri
Class: -
Course Code: ICT.I216
Number of credits: 200
Course offered: 2024
Offered quarter: 4Q
Syllabus updated: Mar 17, 2025
Language: Japanese

Syllabus

Course overview and goals

This class covers the basic design methodologies for software components (instruction-set, assembly language) and hardware components (memory, register, arithmetic circuits, bus) of computer systems.

Course description and aims

Obtain basic understanding of computer architecture on software/hardware components.
Obtain skills for assembly language programming.
Obtain skills for modeling hardware behaviors with register transfer descriptions.
Obtain skills for designing computer logic circuits.

Keywords

Computer, logic circuit, software, hardware, assembly language, register transfer description, instruction execution control

Competencies

Specialist skills
Intercultural skills
Communication skills
Critical thinking skills
Practical and/or problem-solving skills

Class flow

Software components (instruction set, assembly language) and hardware components (logic circuit, register transfer description) will be described in each lecture.

Course schedule/Objectives

	Course schedule	Objectives
Class 1	Introduction to computer architecture : software (instruction set, assembly language) and hardware components (memory, register, arithmetic logic, bus)	Understand the overall computer architecture
Class 2	Instruction set, machine language, assembly language	Understand instruction set structure
Class 3	Software design and compiler structure	Understand the relationship of high-level programming language, compiler and assembler program
Class 4	Instruction decode logic design	Understand instruction decode logic design from instruction format
Class 5	Computer hardware architecture and instruction execution cycle	Understand computer hardware architecture and instruction execution phases
Class 6	Datapath control logic design	Understand datapath control logic for implementing data transfers
Class 7	Registers and Memory	Understand registers, memory architecture and their control logic
Class 8	Arithmetic logic unit design	Understand arithmetic logic unit logic design
Class 9	Processor pipeline structure	Understand processor pipeline structure
Class 10	Computer logic design methodology	Understand the overall flow of computer logic design
Class 11	Basics of hardware description language	Understand hardware description language, logic circuit design and logic simulation
Class 12	Combinational logic	Understand descriptions of combinational logic
Class 13	Sequential logic	Understand descriptions of sequential logic
Class 14	Sequential and Combinational logic	Understand descriptions of sequential and combinational logic

Study advice (preparation and review)

To enhance effective learning, students are encouraged to spend approximately 100 minutes preparing for class and another 100 minutes reviewing class content afterwards (including assignments) for each class.
They should do so by referring to textbooks and other course material.

Textbook(s)

Will be distributed via T2SCHOLA

Reference books, course materials, etc.

Computer Architecture, D.A. Patterson, J.L. Hennesy, Nikkei BP, 2014

Evaluation methods and criteria

Grades based on final examination and in-class exercises on computer architecture, assembly programming, register transfer description, arithmetic logic design and hardware description language.

Related courses

ICT.I211 ： Theory and Design of Logic Circuits
ICT.E304 ： Experiments of Inforamtion and Communications Engineering III
ICT.I308 ： Computer Architecture (ICT)
ICT.I415 ： VLSI System Design
ICT.I317 ： Embedded Systems

Prerequisites

Basic knowledge on logic circuit design is required.