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2020 Faculty Courses School of Engineering Undergraduate major in Information and Communications Engineering

Computer Architecture (ICT)

Academic unit or major
Undergraduate major in Information and Communications Engineering
Instructor(s)
Masato Motomura / Yoshihiro Watanabe
Class Format
Lecture (Zoom)
Media-enhanced courses
-
Day of week/Period
(Classrooms)
3-4 Tue (S621) / 3-4 Fri (S621)
Class
-
Course Code
ICT.I308
Number of credits
200
Course offered
2020
Offered quarter
2Q
Syllabus updated
Jul 10, 2025
Language
Japanese

Syllabus

Course overview and goals

This lecture covers fundamentals and advanced techniques for computers.
The focus is to let students understand architectural techniques actually used in modern computers.
The lecture also covers important technologies in today's computing systems such as multi-processor, domain-specific processor, and embedded systems.

Course description and aims

At the end of this course, students will be able to understand
- Fundamentals (Instruction set, etc.) and advanced techniques (Pipeline, Memory hierarchy, etc.) of modern computers
- Multi-processor computing architectures
- Domain-specific processors
- Embedded systems and processors used therein

Student learning outcomes

実務経験と講義内容との関連 (又は実践的教育内容)

The lecture is based on the lecturer's experience on product-level processors and processor-based system LSI designs

Keywords

Instruction set, Pipeline, Memory hierarchy, Multi-Processor, Domain-specific processor, Embedded system

Competencies

  • Specialist skills
  • Intercultural skills
  • Communication skills
  • Critical thinking skills
  • Practical and/or problem-solving skills

Class flow

1) At the beginning of each class, the contents of previous class are reviewed.
2) Towards the end of class, students are given exercise problems related to what is taught on that day to solve.
3) Before coming to class, students should read the course schedule and check what topics will be covered. Required learning should be completed outside of the classroom for preparation and review purposes.

Course schedule/Objectives

Course schedule Objectives
Class 1 Computer Abstractions and Technology Study history of computers and their evaluation schemes, and understand the aim of the lecture.
Class 2 Instructions: Language of the Computer -1 Understand the role of instruction set in computers
Class 3 Instructions: Language of the Computer -1 Understand the interface between hardware and software
Class 4 Arithmetic for Computers Understand numerical representations and arithmetic operations in computers
Class 5 The Processor -1 Understand fundamental execution models in processors
Class 6 The Processor -2 Understand pipeline executions in processors
Class 7 Memory Hierarchy -1 Understand the needs and rolls of memory hierarchy in computing systems
Class 8 Memory Hierarchy -2 Understand real examples and advanced topics of memory hierarchy in computing systems
Class 9 Parallel Processors Understand computing architectures for parallel execution
Class 10 Domain-specific Processors -1 Understand domain specific processors such as GPU
Class 11 Domain-specific Processors -2 Understand domain specific processors such as GPU
Class 12 Embedded Systems -1 Understand embedded systems and processors used therein
Class 13 Embedded Systems -2 Understand embedded systems and processors used therein
Class 14 Examination Check understanding

Study advice (preparation and review)

To enhance effective learning, students are encouraged to spend approximately 100 minutes preparing for class and another 100 minutes reviewing class content afterwards (including assignments) for each class.
They should do so by referring to textbooks and other course material.

Textbook(s)

Course materials are provided OCW-i.

Reference books, course materials, etc.

D. A. Patterson and J. L. Hennessy, "Computer Organization and Design, RISC-5 Edition," Elsevier Inc. (2018)

Evaluation methods and criteria

1) Students will be assessed on their understanding of the lecture (basic and advanced techniques of computers, multi-processor architectures, domain-specific processors, embedded systems, etc.)
2) Students’ course scores are based on examination (100%)
3) Full attendance is compulsory.
4) The instructor may fail a student if he/she repeatedly does not attend too often and/or comes to class late too often.

Related courses

  • ICT.I216 : Computer Logic Design (ICT)
  • ICT.I303 : Integrated Circuit Design
  • ICT.I415 : VLSI System Design
  • ICT.I501 : Engineering of System LSI Design (System Design)
  • ICT.I211 : Theory and Design of Logic Circuits
  • ICT.I317 : Embedded Systems
  • ICT.I516 : Engineering of System LSI Design (Embedded Software Design)

Prerequisites

Students are strongly recommended to attend the "ICT.I216 : Computer Logic Design (ICT)" class.

Contact information (e-mail and phone) Notice : Please replace from ”[at]” to ”@”(half-width character).

Masato Motomura : motomura[at]artic.iir.titech.ac.jp
Yoshihiro Watanabe:watanabe.y.cl[at]m.titech.ac.jp

Office hours

Contact by e-mail in advance to schedule an appointment.